Maintaining Cache Coherence through Compiler-Directed Data Prefetching |
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Authors: | Hock-Beng Lim Pen-Chung Yew |
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Affiliation: | aCenter for Supercomputing R & D, University of Illinois, Urbana, Illinois, 61801, f1;bDept. of Computer Science, University of Minnesota, Minneapolis, Minnesota, 55455, f2 |
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Abstract: | In this paper, we propose a compiler-directed cache coherence scheme which makes use of data prefetching to enforce cache coherence in large-scale distributed shared-memory (DSM) systems. TheCache Coherence With Data Prefetching(CCDP) scheme uses compiler analyses to identify potentially stale and nonstale data references in a parallel program and enforces cache coherence by prefetching the potentially stale references. In this manner, the CCDP scheme brings up-to-date data into the caches to avoid stale references and also hides the latency of these memory accesses. Furthermore, the scheme also prefetches the nonstale references to hide their memory latencies. To evaluate the performance impact of the CCDP scheme on a real system, we applied the scheme on five applications from the SPEC CFP95 and CFP92 benchmark suites, and executed the resulting codes on the Cray T3D. The experimental results indicate that for all of the applications studied, our scheme provides significant performance improvements by caching shared data and using data prefetching to enforce cache coherence and to hide memory latency. |
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Keywords: | Compiler-directed cache coherence data prefetching memory system compiler shared-memory multiprocessors |
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