| 基于FPGA的数据采集系统设计与实现 |
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| 引用本文： | 张泽军,林平分.基于FPGA的数据采集系统设计与实现[J].中国集成电路,2012(6):44-48,58. |
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| 作者姓名： | 张泽军 林平分 |
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| 作者单位： | 北京工业大学嵌入式系统重点实验室,北京,100124 |
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| 摘 要： | 设计并实现了一种基于FPGA的高速数据采集系统,后端系统用于采集目标ADC芯片的数字输出,将采集后的数据传输至PC机再进行分析。数据采集系统采用DDR2 SDRAM存储、千兆以太网(Gigabit Ethernet,GE)传输设计,在Altera Stratix III FPGA平台上进行了测试与应用,最终成功采集1GByte的数据,连续没有数据丢失。
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| 关 键 词： | FPGA DDR2 SDRAM 数据采集 |
Design and Implementation of Data Acquisition System based on FPGA |
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| ZHANG Ze-jun,LIN Pingfen.Design and Implementation of Data Acquisition System based on FPGA[J].China Integrated Circuit,2012(6):44-48,58. |
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| Authors: | ZHANG Ze-jun LIN Pingfen |
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| Affiliation: | (Beijing University of Technology,Beijing Embedded System Key Lab,Beijing,100124,China) |
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| Abstract: | Design and Implementation of data acquisition system(DAS) based on FPGA,which is used to get the output data of target ADC,and transmit them to PC for analysis.DAS is achieved with DDR2 SDRAM storing and Gigabit Ethernet transmitting data,and is implemented on Altera Stratix III FPGA platform.Finally,the DAS successfully sample 1GByte data without data missing. |
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| Keywords: | FPGA DDR2 SDRAM Data Acquisition |
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