| 复合埋层上的薄层SOI-LDMOS功率器件 |
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| 引用本文： | 阳小明,蔡育,李天倩,王军,卿朝进.复合埋层上的薄层SOI-LDMOS功率器件[J].电子元件与材料,2012(12):42-45. |
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| 作者姓名： | 阳小明 蔡育 李天倩 王军 卿朝进 |
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| 作者单位： | 西华大学电气信息学院;成都纺织专科高等专科学校 |
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| 基金项目： | 四川省重点学科基金资助项目(No.SZD0503-09-0);教育部春晖计划基金资助项目(No.Z2011091) |
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| 摘 要： | 为了提高SOI-LDMOS功率器件击穿电压及相关性能,针对薄层SOI-LDMOS功率器件提出了一种新结构,在新结构中引入了复合埋层,它由p埋层与Si3N4绝缘介质埋层构成。复合埋层不仅改善了比导通电阻与耐压的关系,而且还缓解了自热效应。仿真结果表明,在漂移区长度为57 m时,新结构耐压达到了1052 V,与CamSemiSOI相当,而比导通电阻与表面最高温度分别比CamSemi SOI降低了233.05.mm2和64 K。
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| 关 键 词： | SOI-LDMOS功率器件 复合埋层 击穿电压 |
Membrane SOI-LDMOS power device with compound buried layer |
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| YANG Xiaoming,CAI Yu,LI Tianqian,WANG Jun,QING Chaojin.Membrane SOI-LDMOS power device with compound buried layer[J].Electronic Components & Materials,2012(12):42-45. |
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| Authors: | YANG Xiaoming CAI Yu LI Tianqian WANG Jun QING Chaojin |
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| Affiliation: | 1(1.School of Electrical and Information,Xihua University,Chengdu 610039,China;2.Chengdu Textile College,Chengdu 610039,China) |
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| Abstract: | In order to improve breakdown voltage and relative properties of SOI-LDMOS power device,a novel structure of the devices was proposed,which was consisted of a buried p-type and Si3N4 layers with compound buried layer(CBL).The CBL not only improved breakdown voltage and specific on-resistance but also alleviated self-heating effect.The simulation results show that breakdown voltage of the novel structure devices is 1 052 V at the 57 μm length of the drift region as same as that of CamSemi SOI,and the specific on-resistance and maximum surface temperature are reduced by 233.05 Ω?mm2 and 64 K than those of CamSemi SOI,respectively. |
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| Keywords: | SOI-LDMOS power device compound buried layer breakdown voltage |
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