Memory-efficient sum-product decoding of LDPC codes |
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Authors: | Sankar H. Narayanan K.R. |
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Affiliation: | Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA; |
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Abstract: | Low-density parity-check (LDPC) codes perform very close to capacity for long lengths on several channels. However, the amount of memory (fixed-point numbers that need to be stored) required for implementing the message-passing algorithm increases linearly as the number of edges in the graph increases. In this letter, we propose a decoding algorithm for decoding LDPC codes that reduces the memory requirement at the decoder. The proposed decoding algorithm can be analyzed using density evolution; further, we show how to design good LDPC codes using this. Results show that this algorithm provides almost the same performance as the conventional sum-product decoding of LDPC codes. |
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