| 新型高速低功耗显式脉冲触发器电路设计 |
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| 引用本文： | 张小阳,贾嵩,王源,张钢刚. 新型高速低功耗显式脉冲触发器电路设计[J]. 半导体学报, 2008, 29(10): 2064-2068 |
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| 作者姓名： | 张小阳 贾嵩 王源 张钢刚 |
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| 作者单位： | 北京大学微电子学研究院,教育部微电子器件与电路重点实验室,北京,100871 |
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| 基金项目： | 国家大学生创新性实验计划 |
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| 摘 要： | 提出了两种新型脉冲触发器结构--EXPAND触发器和EXPAND-TG触发器.同传统结构相比,新结构一方面通过减小中间节点电容提高电路亢放电速度,另一方面通过消除信号竞争避免直流短路电流对电路速度和功耗的影响.同其他文献报道的结构相比,新结构在功耗和速度上均有明显的改进.
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| 关 键 词： | 数字电路 触发器 高速 低功耗 脉冲 |
| 收稿时间： | 2015-08-18 |
| 修稿时间： | 2008-06-12 |
Design of Low Power and High Performance Explicit-Pulsed Flip-Flops |
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| Zhang Xiaoyang, Jia Song, Wang Yuan, Zhang Ganggang. Design of Low Power and High Performance Explicit-Pulsed Flip-Flops[J]. Journal of Semiconductors, 2008, In Press. Zhang X Y, Jia S, Wang Y, Zhang G G. Design of Low Power and High Performance Explicit-Pulsed Flip-Flops[J]. J. Semicond., 2008, 29(10): 2064.Export: BibTex EndNote |
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| Authors: | Zhang Xiaoyang Jia Song Wang Yuan Zhang Ganggang |
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| Affiliation: | Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking University,Beijing 100871,China;Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking University,Beijing 100871,China;Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking University,Beijing 100871,China;Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking University,Beijing 100871,China |
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| Abstract: | The speed and delay of flip-flops are critical to the performance of digital circuit systems.Two novel structures for dual-edge triggered explicit-pulsed flip-flops are proposed in this paper.The charging and discharging times are greatly reduced due to the lower capacitance of the interval nodes in the new structures,and the short circuit power consumption is diminished by overcoming the race problem as well.The flip-flops are also superior to the structures reported in the literature in terms of both power dissipation and working speed. |
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| Keywords: | digital circuits flip-flops high speed low power pulse |
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