Stress-induced degradation of p- and n-type organic thin-film-transistors in the ON and OFF states |
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| Affiliation: | 1. Department of Information Engineering, University of Padova, Via Gradenigo 6/B, 35131 Padova, Italy;2. E.T.C. S.r.l, Via Piero Gobetti, 101, 40129 Bologna, Italy;3. CNR-ISMN Bologna, Via Piero Gobetti, 101, 40129 Bologna, Italy;1. Toyota Central R&D Labs., Inc., 41-1, Yokomichi, Nagakute, Aichi 480-1192, Japan;2. Department of Electrical and Electronic Engineering, Daido University, Nagoya, Aichi 457-8530, Japan;1. Departament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, Cerdanyola del Valles, Spain;2. Departamento de Electricidad y Electrónica, Universidad de Valladolid, Valladolid, Spain;3. Department of Chemistry, University of Helsinki, Helsinki, Finland;1. Infineon Dresden Technologies Dresden GmbH, Koenigsbruecker Str. 180, 01099 Dresden, Germany;2. Infineon Technologies AG, Am Campeon 1-12, 85579 Neubiberg, Germany;3. NaMLab gGmbH, Noethnitzer Str. 64, 01187 Dresden, Germany;4. TU Dresden, Department of Nanoelectronic Materials, University of Technology Dresden, Faculty of Electrical and Computer Engineering, Helmholzstraße 18, 01062 Dresden, Germany;1. Department of Electrical Engineering and Information Technologies, University of Naples Federico II, Italy;2. Toyota Motor Corporation, 543, Kirigahora, Nishihirose-cho, Toyota, Aichi 470-0309, Japan |
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| Abstract: | In this work we analyzed the effect of different stress configurations on p- and n-type organic thin-film-transistors, to emulate the various operating conditions in a real application. Devices showed the largest degradation when they are stressed in the ON condition, because of the uniform charge injection and defect generation in the whole channel area. Charge trapping kinetics and mobility degradation was also strongly dependent on the semiconductor type, suggesting a key-role of the semiconductor on the device reliability. |
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| Keywords: | Organic electronics Organic thin-film-transistors Reliability |
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