Impact of gate material engineering(GME) on analog/RF performance of nanowire Schottky-barrier gate all around (GAA) MOSFET for low power wireless applications: 3D T-CAD simulation |
| |
| Affiliation: | 1. Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, New Delhi 110021, India;2. Department of Physics, Motilal Nehru College, University of Delhi, New Delhi 110021, India;3. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Delhi 110086, India;1. ESDC, College of Engineering, Swansea University, Swansea SA1 8EN, Wales, United Kingdom;2. ZCCE, College of Engineering, Swansea University, Swansea SA1 8EN, Wales, United Kingdom;3. Dept of Mathematics & Engineering Physics, Faculty of Engineering, Mansoura University, Mansoura 35516, Egypt;4. WCPM, School of Engineering, University of Warwick, Coventry CV4 7AL, England, United Kingdom;5. CITIUS, Universidade de Santiago de Compostela, 15782 Santiago de Compostela, Galicia, Spain;6. Varian Medical Systems Finland, Helsinki, Finland;1. Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, New Delhi-110021, India;2. Department of Physics, Motilal Nehru College, University of Delhi, New Delhi-110021, India;3. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Delhi-110086, India;1. DIIES, Mediterranea University of Reggio Calabria, Reggio Calabria, Italy;2. LAAAS, Department of Electronics, University Mostefa Benboulaid – Batna 2, Algeria;3. Laboratory of Metallic and Semiconductor Materials, University of Biskra, Algeria;1. Nanoelectronics Laboratory, Department of Electrical Engineering, National Institute of Technology (NIT), Rourkela 769008, Odisha, India;2. ONERA, 31055 Toulouse, France |
| |
| Abstract: | In this paper Gate Material Engineered (GME) Gate-Stack (GS) silicon nanowire Schottky-Barrier (SB) Gate All Around (GAA) MOSFET and Single Material Gate Stack Schottky-Barrier Source/Drain Gate All Around (SM-GS-SB-S/D GAA) structures are proposed for low- power wireless applications. The Analog/RF performance for wireless applications of these devices are demonstrated. The effect of Schottky-Barrier (Metal) S/D is studied for Single Metal (SM)–SB-GAA, (Dual Metal) DM-SB-GAA, SM-GS-SB-GAA and GME-GS-SB-GAA MOSFETs, and it is found that GME-GS-SB-GAA MOSFET with metal drain source shows much improved performance in terms of transconductance (gm), output conductance (gd), Early Voltage (VEA), Maximum Transducer Power Gain, cut-off frequency (fT), and Ion/Ioff ratio. Further, harmonic distortion for wireless applications is also studied using ATLAS-3D device simulator. Due to low parasitic S/D resistance the metal Source/Drain DM-GS-SB-S/D-GAA MOSFET demonstrates remarkable Ion of~31.8 μA/μm and saturation transconductance gm of~68.2 μS with improved third order derivative of transconductance gm3. |
| |
| Keywords: | ATLAS-3D Dual material gate Gate all around Gate stack Gate material engineered (GME) Schottky-barrier (metal) source/drain Wireless applications |
| 本文献已被 ScienceDirect 等数据库收录！ |
|
