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Analysis and CAD implementation techniques of total harmonic distortion in analog VLSI circuits
Authors:Shu-Chuan Huang  Mohammed Ismail  Roelof F. Wassenaar
Affiliation:(1) Dept. of Electrical Engineering, Tatung Institute of Technology, Taipei, Taiwan, R.O.C.;(2) Solid-State Microelectronics Laboratory, Dept. of Electrical Engineering, the Ohio State University, 43210-1272 Columbus, Ohio, U.S.A.;(3) Faculty of Electrical Engineering, University of Twente, 7500 AE Enschede, The Netherlands
Abstract:This paper presents a new methodlogy to accurately evaluate the total harmonic distortion (THD) behavior of modern integrated circuits. The methodology is general, technology independent and is used to determine large-signal or reactive THD of signal processing circuits operating in the voltage or the current domain. It is based on Fourier series analysis and Parseval's theorem, where numerical integration may be needed to accurately compute THD. For low-frequency THD, the numerical integration can be simplified to a small number of summation without degrading the accuracy. The new methodology is incorporated in a computer-aided environment which accurately estimates THD, and the speed of calculation for many circuit is several orders of magnitude faster than SPICE or other commercial CAD tools. In addition, optimization of transistor sizes to reduce THD can be achieved by incorporating the methodology in an object-oriented CAD tool such as APLAC.Currently on leave as a Fulbright-Hays professor at the Helsinki University of Technology, Finland.
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