一种高速低功耗电荷泵电路的设计

介绍了作为高速锁相环电路集成芯片一部分的高速低功耗电荷泵电路的设计。所设计的锁相环路适应高频工作环境,电路结构采用当前的主流结构———D/A混合结构的电荷泵锁相环。环路中的鉴相器是数字鉴频鉴相器结构,没有反馈回路,提高了工作频率,并且缓解了传统鉴频鉴相器中死区的产生。电荷泵结构进行了一定的改进,既使电路结构简单,又削弱了MOS管带来的非理想特性,使得电荷注入、电荷分享、时钟脉冲馈通等寄生效应得到最大程度的减缓,同时保证高速、低功耗的电路性能。压控振荡器采用环路振荡器结构,易于集成而且功耗低。

Design of High-speed and Low-power Consumption Charge Pump Circuit

The content of this paper is a part of the project"chip design of high-speed phase-locked loop integrated circuit".We improved the circuit structure in order to increase the frequency of the CPPLL.The PFD is based on a novel high-speed structure without feedback loops,thus avoiding the dead zone.The CP's output is in the drain state while its switches are on the sources of MOS transistors.In this way high switching speed is achieved and the effects of charge injection and charge sharing are reduced.