基于可重构处理器的 AVS 高清解码的探究

面向新型可重构处理器架构、动态配置、多任务调度和运行管理嵌入式高性能并行计算关键技术，提出了一种新的针对 AVS(audio video coding standard)高清视频解码的实现方案，该方案是将 AVS 解码过程中的各种算法，映射到一个可重构处理器 Remus(Reconfigurable Multimedia System)上，并通过仿真验证，在 200M的工作频率下，实现了 1080p 的 AVS 高清码流实时解码(30f/s)。基于可重构处理器的 AVS 解码实现方案，比目前市场上已存在的基于 ASIC 的多种高清解码方案具有更好的灵活性，而具体到解码过程中的典型算法，特别是循环计算，比现有的已提出的硬件加速器具有更好的加速性能。

Research of AVS HD decoding based on reconfigurable processor

According to a key technologies of embedded high-performance parallel computing for a new reconfigurable processor architecture, dynamic configuration, multi-task scheduling and operational management, a new method of AVS HD decoding implementation has been proposed in this paper. The decoding process is based on a reconfigurable system, called Remus (Reconfigurable Multimedia System). By mapping the algorithms of AVS to Remus, the system can support 192020x1080@30fps real-time decoding of AVS JiZhun profile at 200 MHz, which has been proved by simulation. The reconfigurable technology based decoding system is much more flexible than the existing ones, mostly based on ASIC (Application Specific Integrated Circuit),with even higher performance.