集成电路中高速锁相环的研究

本文主要研究的是集成电路芯片中的高速锁相环路模块。本文设计的是一款用于数字电视机顶盒的IC电路的锁相环模块,由模拟锁相环路和一个AFC数字控制相结合的锁相模式,目的是在保证了锁相的速度和精度的同时,还能直观、有效的读出AFC控制的范围。

A study of high-speed PLL IC

The purpose of this project is to design a high- speed integrated circuit chip phase- locked loop module. The module subject of a phase- locked loop is designed for digital TV set- top box to the IC circuit,and the analog phase locked loop is controlled by a combination of digital AFC lock- mode phase- locked to ensure speed and accuracy,and at the same time can directly and effectively control the read range of AFC.