数字IC的射频电磁发射模型建模方法

针对传统方法无法直接得到芯片内核到外部引脚传输路径特性的问题,提出了一种简单有效的数字IC的电磁发射建模方法。该模型由内部活动模型和传输路径模型组成。利用嵌入式环形振荡器的直流响应和外源射频干扰效应,直接测量出芯片内核到外部引脚路径的电压传输率,有效抽取出传输模型结构。利用晶体管级Hspice仿真得到内部活动模型,获得了完整的电磁发射模型。在SMIC 130 nm 工艺的测试芯片上应用该模型,对比模型仿真结果与实物测量结果,验证了该模型建模方法的正确性。该方法可用于系统设计阶段,对数字IC的电磁发射进行预测,使系统能满足电磁发射的要求。

Modeling Method of RF Electromagnetic Emission Model of Digital IC

Traditional modeling approaches could not directly extract the characteristics of the transmission path from the chip core to the external pin. A simple and effective electromagnetic emission(EME) modeling method for digital IC was presented. The model was composed by a transmission path model and an internal activity model. The transmission model structure could be extracted from the measured voltage transfer ratio from the pin to the core of the chip by building upon the DC response and external RF interference effect of the embedded ring oscillator(RO). The internal activity model was found by performing transistor-level HSPICE simulation. Consequently, a complete EME model was established. The modeling method was applied to a test chip that was fabricated in a 130 nm CMOS technology. Its correctness was verified by comparing the model simulation results with the measurement results. The modeling method could be used to predict the EME generated by the digital ICs during the system design phase and to contribute to the systems that needed to meet the EME standard requirements.