防御零值功耗攻击的AES SubByte模块设计及其VLSI实现

 密码器件在执行高级加密标准(Advanced Encryption Standard,AES)时常以能量消耗方式泄漏密钥信息,为有效降低其与实际处理数据之间的相关性,该文提出一种具有防御零值功耗攻击性能的AES SubByte模块设计及其VLSI实现方案.首先,在分析GF(256)域求逆算法的基础上,采用关键模块复用的方法,提出一种更为有效的加法性屏蔽求逆算法;然后依此进一步得到一种新型的SubByte模块结构,实现在不影响对所有中间数据进行加法性屏蔽编码的同时,减少电路的芯片开销、提高电路的工作速度.实验结果表明,所设计的电路具有正确的逻辑功能.与传统SubByte模块比较,该设计的最高工作频率和面积都有较大的优化.

Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation

The secret information of cipherware leaks as energy consumption during AES implementation.To reduce the correlation between the secret information and the processing data effectively,this paper investigate a design of AES SubByte module of anti-zero value power attack and its VLSI implementation.First,by analyzing the traditional GF(256) inversion algorithm,an improved additive masking GF(256) inversion algorithm which adopts key module reuse method is proposed.Then a novel SubByte module structure is constructed by applying such algorithm,which has significant area and speed improvement and all data can be additive masked.The experimental results show that the novel scheme has correct logic function.Compared with traditional SubByte module,a remarkable improvement is achieved by the proposed approach on highest working frequency and area.