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深亚微米CMOS低噪声放大器的设计
引用本文:宋蓓,谢婷婷,陈志恒.深亚微米CMOS低噪声放大器的设计[J].电气电子教学学报,2002,24(6):29-31,45.
作者姓名:宋蓓  谢婷婷  陈志恒
作者单位:东南大学,射频与光电集成电路研究所,江苏,南京,210096
摘    要:通过一个符合性能指标的,用于射频接收系统的CMOS低噪声放大性能的设计,讨论了深亚微米MOSFET的噪声情况,并在满足增旋和功耗的前提下,对低噪声放大噪声性能进行分析和优化,该LNA工作在2.5GHz电源电压,直流功耗为25mW,能够提供19dB的增益(S21),而噪声系数仅为2.5dB,同时输入匹配良好,S11为-45dB,整个电路只采用了一个片外电感使电路保持谐振,此设计结果证明CMOS工艺在射频集成电路设计领域具有可观的潜力。

关 键 词:低噪声放大器  深亚微米MOSFET  噪声系数  LAN
文章编号:1008-0686(2002)06-0029-04

The Design of Deep Submicron CMOS LNA
SONG Bei,XIE Ting ting,CHEN Zhi heng.The Design of Deep Submicron CMOS LNA[J].Journal of Electrical & Electronic Engineering Education,2002,24(6):29-31,45.
Authors:SONG Bei  XIE Ting ting  CHEN Zhi heng
Abstract:This paper introduces the design of a CMOS LNA, including a detailed discussion on the noise of deep submicron MOS devices. Then Noise figure of the LNA is optimized under specified gain and power consumption. Working at 2.5GHz, the LNA draws 8.4mA from a 3V supply. It provides a power gain(S21) of 19dB with a noise figure of only 2.5dB. The input is well matched at 2.5GHz with -42dB S11. A single off chip inductor is used to keep resonance at the center frequency. These results proved the potential of CMOS RF IC designs.
Keywords:CMOS RF  IC  LNA  deep submicron MOSFET  noise figure  
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