11 GHz CMOS /spl Sigma//spl Delta/ frequency synthesiser |
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| Authors: | Solomko V.A. Weger P. |
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| Affiliation: | Chair of Circuit Design, Brandenburg Univ. of Technol., Cottbus; |
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| Abstract: | A fully integrated 11 GHz fractional-N PLL with a three-stage MASH SigmaDelta modulator with DC dither in all stages is implemented in a standard 0.13 mum CMOS technology. The synthesiser generates no fractional spurs at frequency offsets outside the loop bandwidth and a small number of fractional spurs with the power not exceeding -44 dBc within the loop bandwidth at the carrier frequency of 11 GHz |
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