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基于FPGA的AIS中频收发信机设计及实现
引用本文:郑 力,钟 杰.基于FPGA的AIS中频收发信机设计及实现[J].电讯技术,2010,50(8).
作者姓名:郑 力  钟 杰
作者单位:中国西南电子技术研究所,成都,610036
摘    要:针对海事自动识别系(Automatic Identification System,AIS)收发信机的信号处理主要采用专用芯片实现的现状,提出了一种中频数字化的替代方案,采用FPGA完成AIS中频收发信机的信号处理.重点研究了突发GMSK中频信号的调制、差分解调、位同步和帧同步的设计方法及实现过程.测试结果表明,采用并行化的数字信号处理,增强了设备的灵活性和可靠性,并提高了设备的性能.

关 键 词:自动识别系统  收发信机  中频数字化  并行数字信号处理

Design and Implementation of an AIS IF Transceiver Based on FPGA
ZHENG Li and ZHONG Jie.Design and Implementation of an AIS IF Transceiver Based on FPGA[J].Telecommunication Engineering,2010,50(8).
Authors:ZHENG Li and ZHONG Jie
Affiliation:Southwest China Institute of Electronic Technology, Chengdu 610036, China;Southwest China Institute of Electronic Technology, Chengdu 610036, China
Abstract:The signal processing of maritime AIS(Automatic Identification System) transceiver is mainly realized by special IC(Integrated Circuit).In this paper, a digital IF(Intermediate Frequency) substitute solution is proposed in which F PGA (Field Programmable Ga te Array) is adopted to implement the maritime AIS IF transceiver signal proces sing.The design and implementation of modulation,difference demodu lation,bit and packet synchronization of burst GMSK IF signal is emphasized.Test results ind icate that this solution leads to much more flexibility and reliability,and the performance of the equipment is also improved thanks to parallel digital signal processing.
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