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基于FPGA的弹载数模混合采集存储系统设计
引用本文:黄玉岗,秦丽,李杰,张波,杜思远.基于FPGA的弹载数模混合采集存储系统设计[J].传感技术学报,2016,29(8):1210-1216.
作者姓名:黄玉岗  秦丽  李杰  张波  杜思远
作者单位:中北大学电子测试技术重点实验室,太原,030051;中北大学电子测试技术重点实验室,太原,030051;中北大学电子测试技术重点实验室,太原,030051;中北大学电子测试技术重点实验室,太原,030051;中北大学电子测试技术重点实验室,太原,030051
基金项目:国家自然科学基金项目(51575500);山西省自然科学基金项目(2014011021-5)
摘    要:针对弹载试验过程中传感器输出方式的不同,设计了一种基于FPGA的弹载数模混合采集存储系统。系统选用Spartan-II系列的XC2S100作为核心处理器,采用16 bit的高精度A/D转换芯片ADS8365实现模数转换。FPGA控制将传感器输出的数字量和模拟量采集编码后存储到固态存储器FLASH中,最后,为了模拟系统在飞行过程中的状态,将系统放置在三轴位置速率摇摆温控转台上进行验证,试验结果证明,所设计的数模混合采集存储系统正确可靠,具有一定的工程应用价值。

关 键 词:信息采集  信息存储  FPGA  ADS8365  FLASH

Design of the Missile-borne Analog Digital Hybird Data Acquisition and Storage System Based on FPGA
HUANG Yugang,QIN Li,LI Jie,ZHANG Bo,DU Siyuan.Design of the Missile-borne Analog Digital Hybird Data Acquisition and Storage System Based on FPGA[J].Journal of Transduction Technology,2016,29(8):1210-1216.
Authors:HUANG Yugang  QIN Li  LI Jie  ZHANG Bo  DU Siyuan
Abstract:Considering the different methods of sensor output in the process of the missile test,we designed a missile data acquisition and storage system that collected mixed digital and analog signal based on FPGA. The system select?ed the Spartan-II series XC2S100 as the core processor and used 16-bit high precision A/D conversion chip ADS8365 to convert analog to digital. FPGA control the sensor output of digital and analog acquisition encoded to the solid-state FLASH memory. Finally,in order to simulate the state of the system in process of flight,we placed the sys?tem on the three axis position rate temperature control turntable for validation,it was verified that the design of the module of mixed collection storage system was accurate and reliable and has certain engineering application value.
Keywords:Information acquisition  Information storage  FPGA  ADS8365  FLASH
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