| Abstract: | This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-mum CMOS and 0.24-mum MRAM processes with five metal layers. |
