Low power LNA using the MOSFETs in moderate inversion |
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Authors: | XIA Wen-bo ZHANG Xiao-lin |
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Affiliation: | School of Electronic Information Engineering, Beihang University, Beijing 100191, China |
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Abstract: | This paper presents an integrated complementary metal oxide semiconductor (CMOS) low power low noise amplifier (LNA) for global positioning system (GPS) receivers. To achieve low power dissipation, the MOS transistors in the proposed LNA are biased in moderate inversion region. It is implemented by SMIC 180 nm 1P6M CMOS process. The experiment results show that a gain of 12.14 dB@1.57 GHz is achieved with low noise figure (NF) of 1.62 dB. The power consumption of the circuit is 1.5 mW at supply voltage of 1.8 V. The ratio of gain to dc power consumption is 8 dB/mW. The size of the LNA is only 980 μm×720 μm including the pads. |
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Keywords: | CMOS GPS LNA moderate inversion radio frequency (RF) |
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