An introduction to fast wafer level reliability monitoring for integrated circuit mass production

The continuous verification of process reliability is essential to semiconductor manufacturing. The tool that accomplishes this task in the required short time is the fast wafer level reliability monitoring (fWLR). The basic approaches for this task are described in this introductory overview. It summarizes sampling plans, discusses the feasibility of using fWLR for screening and describes the data assessment and application of control cards. Beyond these general topics many of the fWLR stress methods are described in detail: Dielectric stressing by means of an exponential current ramp is compared to ramped voltage stress. Especially for thin oxides the methods differ regarding the soft breakdown detection and the time they consume. Another task of fWLR is the detection of plasma induced damage, which can be achieved by applying a revealing stress to MOSFETs with antenna. The design challenges of the structures and the test method as well as the data assessment are described in detail. An important section deals with fWLR for interconnects. In this section the appropriate test structures (including thermal simulations) are illustrated and fast electromigration stresses are discussed and the details of standard wafer level electromigration accelerated test (SWEAT) are included. For contacts and vias a simple method to check reliability is presented. Finally the monitoring of device reliability is treated. It is shown that using indirect parameters that correlate well to standard parameters such as the drain current can be beneficial for fWLR. For both, the interconnects and the devices, it is essential to have locally heated test structures in order to keep the stress time low. The detection and verification of mobile ions can also be performed with such a self-heated structure. For the described methods examples are given to illustrate the usefulness.