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Integrating thick copper/Black Diamond™ layer in CMOS interconnect process for RF passive components
Authors:Guo Lihui  Zhang Yibin  Su Yong Jie Jeffrey
Affiliation:Semiconductor Process Technology Laboratory, Institute of Microelectronics, 11 Science Park Road, Singapore Science Park II, 117685, Singapore, Singapore
Abstract:Thick copper (Cu)/Black Diamond™ (BD) layer up to 4 μm has successfully been integrated in CMOS interconnect process to improve the quality of on-chip RF passive components. It is shown that BD film is easy to crack when its thickness is up to 4 μm. However, by inserting one or few layers of dielectric material, BloK™, the stress in the entire dielectric film stack can be reduced. Although the reduction of the tensile stress of the stack is insignificant, the inserted BloK™ layer effectively prevents cracking from happening in the film stack. Spiral inductors have been integrated in developed Cu/BD (4 μm) top-metal-layer. Both Q value and resonate frequency of developed inductors are improved comparing to the inductors fabricated in previous top-metal-layer with 1 μm Cu/SiO2 stack.
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