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FPGA在馈电终端单元的应用
引用本文:傅金明,王东兴. FPGA在馈电终端单元的应用[J]. 北京机械工业学院学报, 2003, 18(4): 5-9,18
作者姓名:傅金明  王东兴
作者单位:北京机械工业学院计算机及自动化系,北京机械工业学院计算机及自动化系 北京100085,北京100085
基金项目:北京市教委科技发展计划项目;;
摘    要:对于传统数据采集系统。由于每次采样占用DSP(Digital Signal Process)的时间,影响其数据处理及运算速度。在馈电终端单元的设计中。我们将FPGA(Field Programmable Gate Arrav)芯片与A/D芯片(MAXl25)相结合,实现成批数据的采集.并在同一FPGA芯片上实现了数字测频电路与系统控制电路。详述了上述功能的实现方法和仿真时序图。实验结果表明,在馈电终端单元中采用FPGA技术。降低了硬件外部连接的复杂程度,提高了系统的整体性能。

关 键 词:可编程逻辑器件 硬件描述语言 馈电终端单元 FPGA 数据采集系统
文章编号:1008-1658(2003)04-0005-05

Application of feeder termination unit based on FPGA
FU Jing-ming,WANG Dong-xing. Application of feeder termination unit based on FPGA[J]. Journal of Beijing Institute of Machinery, 2003, 18(4): 5-9,18
Authors:FU Jing-ming  WANG Dong-xing
Abstract:In traditional data acquisition system, data processing and calculating speed of Data Signal Process may slow down as each data sampling may use the working time of DSP. In feeder termination unit designing, FPGA chip is combined with A/D chip(MAX125) to achieve data batch processing, and digital frequency measuring circuit and system control circuit are put together in the same FPGA chip. The achieving ways of FPGA function and emulation oscillograph are presented in the article. It is concluded that applying FPGA in feeder termination unit can simplify complexity of external hardware connection and improve integral system capability.
Keywords:feeder termination unit  FPGA  VHDL
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