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Effect of test condition and stress free temperature on the electromigration failure of Cu dual damascene submicron interconnect line-via test structures
Authors:Arijit Roy  Cher Ming Tan  Rakesh Kumar  Xian Tong Chen
Affiliation:aSchool of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639 798;bSemiconductor Process Technologies Laboratory, Institute of Microelectronics, 11 Science Park Road, Science Park II, Singapore 117 685
Abstract:Atomic flux divergence (AFD) based finite element analyses have been performed to show the difference in the electromigration (EM) failure mechanisms at different test conditions for Cu dual damascene line-via test structures. A combined driving force approach adapted in the model consists of driving forces from electron-wind, stress-migration and thermo-migration. It is shown that the failure mechanisms depend on the test condition and the stress free temperature of the structure. As the failure time depends on the failure mechanisms, the life-time prediction from accelerated test would be inaccurate if the invariability of failure mechanisms is assumed. It is also found that the interconnect life-time can be improved by lowering the final annealing temperature of the structure.
Keywords:
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