基于反馈控制结构的FFT信号处理器设计与FPGA实现

研究了基于FPGA的基-2 FFT算法的设计与实现。为减小硬件资源开销,论文采用蝶形运算单元和控制器单元构成的反馈结构对基-2 FFT处理器的硬件j结构进行了总体设计,采用时序控制方法完成蝶形运算电路设计,采用同步有限状态机(FSM,finite state machine)方法实现了旋转因子系数的产生与控制。并基于Quartus II软件平台,完成了整个FFT处理器电路的FPGA实现,最后通过仿真验证了设计方案的正确性。

The Design of FFT Processor and its Realization by FPGA Based on the Backward Control structure

The design and realization of the base-2 FFT algorithm was researched by FPGA.?In order to reduce the consumption of hardware resources,the whole hardware system of the processor was designed by using the backward structure composed of the butterfly units and controller unit.The butterfly units were completed by designing the controlling time,the rotation factors were produced and controlled by the synchronous finite state machine.Then the whole FFT processor was realized in FPGA device based on Quartus II software simulation platform.The final simulated results indicate that the design scheme is correct.