基于算法状态机FPGA的空间TDICCD相机控制器

针对目前基于数字信号处理(DSP)的空间时间延时积分电荷耦合器件(TDICCD)相机控制器可靠性差、资源耗费和功耗大、程序重调能力差等问题，提出了一种算法状态机现场可编程门阵列(FPGA)的空间电荷耦合器件(CCD)相机控制器。控制器使用 FPGA 代替 DSP，控制程序使用VHDL语言编写。使用自主研发的地面检测设备进行实验，实验结果表明，相机控制器可以稳定正常地工作，控制 CCD 拍摄的图像清晰，未发生串行现象。整个控制程序占用 FPGA 资源较少，占用 LUTs和 Block RAMs分别为38%和20%，满足空间 CCD相机应用的需求。

Space TDICCD camera controller implementation using algorithmic state machine in FPGA

A Charge Coupled Device(CCD) camera controller based on Algorithmic State Machine (ASM) in FPGA is proposed in order to solve the problems of poor reliability, high power and hardware consumption, poor reprogram ability, etc. for space Time Delay and Integration Charge Coupled Device(TDICCD) camera controller based on DSP processor. The proposed controller takes FPGA instead of DSP, and the controller program is written in VHDL language. The whole controlling program is implemented by ASM. The self-developed ground test equipment is employed to test the proposed camera controller. The experimental results indicate that the proposed camera controller can work stably and normally; and the image captured by CCD is very clear without being overlapped. It consumes less FPGA resource for the whole controlling program, and the utilization of LUTs and Block RAMs are 38% and 20%, respectively, which satisfies the application requirement of space camera.