一种抗负压和抗共模噪声的全集成GaN电平位移电路

设计了一种基于全集成GaN工艺平台，具有抗负压、抗共模噪声的电平位移电路。相较于传统的电平位移电路，通过电路设计将驱动部分的低电压域同高侧部分电路的低电压域保持一致，实现了抗负压的功能。除此之外，针对半桥驱动开关节点的抬升、下降引起内部电容充放电并导致信号逻辑错误的问题，对高侧部分电路进行设计，实现了抗共模噪声的能力。在200 V GaN工艺下，电平位移电路将0～6 V的输入信号转换至200～206 V。仿真结果表明，该电平位移电路的上升传输延时为4.74 ns,下降传输延时为4.11 ns,抗开关节点负压为-4 V,具有100 V/ns共模噪声抑制能力。

A Fully Integrated GaN Level Shifter with Negative Rail Compatibilityand High dv/dt Immunity

A level shifter circuit based on the fully integrated GaN SOI platform with high dv/dt immunity and negative rail compatibility was designed. Compared with the traditional level shifter circuits, the low voltage domain of the driving part was consistent with the low voltage domain of the high side part of the circuit through the circuit design, and the negative voltage suppression function was realized. Besides, aiming at the logic signal error caused by the internal capacitor charging and discharging caused by the rising and falling of the half-bridge driving switch node, the part of the circuit on the high side was designed to achieve the ability of immunizing common mode noise. In the 200 V GaN SOI process, the level shift circuit converted the 0-6 V input signal to 200-206 V one. The simulation results show that the level shift circuit has a rise transmission delay of 4.74 ns, a fall transmission delay of 4.11 ns, a compatibility to switch node negative rail to -4 V, and a common-mode noise immunity capability of 100 V/ns.