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Energy Efficient Hardware Loop Based Optimization for CGRAs |
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| Authors: | Sunny Chilankamol Das Satyajit Martin Kevin J M Coussy Philippe |
| Affiliation: | 1.IIT Palakkad, Palakkad, Kerala, India ;2.Univ. Bretagne-Sud, UMR 6285, Lab-STICC, F-56100, Lorient, France ; |
| Abstract: | Journal of Signal Processing Systems - Research interest and industry investment in edge computing solutions have increased dramatically in recent years. Consequent quest for balanced performance,... |
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| 本文献已被 SpringerLink 等数据库收录！ | |