High Speed 4-Symbol Arithmetic Encoder Architecture for Embedded Zero Tree-Based Compression |
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Authors: | Roberto R. Osorio and Bart Vanhoof |
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Affiliation: | (1) IMEC, DESICS, Kapeldreef, 75, B-3001 Leuven, Belgium |
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Abstract: | In state-of-the-art multimedia compression standards, arithmetic coding is widely used as a powerful entropy compression method. In the MPEG-4 standard a specific 4-symbol, multiple-context arithmetic coder is used for wavelet based image compression. In this paper we present a first-of-a-kind architecture capable of processing close to 1 symbol per cycle, managing multiple context in a simple, yet cost-efficient manner. We explain the need for such an architecture, develop the algorithm and propose an efficient implementation. The characteristics of the architecture are detailed and a comparison with other alternatives is presented. This architecture has been synthesized achieving a maximum speed of 170 MHz, equivalent to 340 Mbits/s. |
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Keywords: | arithmetic coding entropy coding |
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