嵌入式逻辑分析仪在FPGA设计中的应用

设计和验证超高密度FPGA的方法是采用逻辑分析仪、示波器和总线分析仪,通过测试头和连接器把信号送到仪器上。随着FPGA设计复杂度的增加,传统的测试方法受到局限。在FPGA内部嵌入逻辑分析核,构成一种嵌入式逻辑分析仪,对FPGA器件内部所有的信号和节点进行测试,这一方法同样可以达到FPGA开发中硬件调试的要求,并且具有无干扰、便于升级和使用方便等优点。SignalTapⅡ正是这样一种嵌入式逻辑分析仪,本文详细介绍了其在调试FPGA时的具体方法和步骤。

Application of Embedded Logic Analyzer in FPGA

Making use of logic analyzer,oscillograph and bus analyzer,we can design and test the super-high density FPGA,and transmit the signal to the instrument through probe and linker. The conventional testing method is limited with the increase of the designing complexity of FPGA. Embedding a logic analysis core in a FPGA,we can construct an embedded logic analyzer and test all the signals and nodes in FPGA. It is the way that can meet the requirements of testing hardware during developing a FPGA and also has some advantages of noninterference,easy upgrade and flexible usage. SignalTap I is such an embedded logic analyzer that its usage and procedure is introduced in detail during debugging a FPGA.