Power-efficient drive circuit for plasma display panel

This paper proposes a power-efficient drive circuit for plasma display panels (PDPs). The proposed circuit reduces reactive power consumption by varying the inductance for energy recovery and by separating the grounds of the sustain and data drivers. Power consumption due to discharge current is reduced by using two soft-switching inductors for the pull-up switches in the bridge circuit. Power consumption for data addressing is reduced by using a dc voltage source to bias the ground for the sustain driver. The proposed circuit was tested on a 50″ full-HD single-scan PDP which had a sustain discharge gap of 80 μm; total power consumption to display the dynamic broadcasting content of IEC 62087 was ∼40 W (14.5%) less than that required by the conventional drive circuit, and the EMI level for 2 < f < 9 MHz was reduced significantly. The experimental results demonstrate that a high performance power-efficient PDP drive circuit can be built using the proposed method.