Effect of high-temperature H2-anneals on the slow-trapping instability of MOS structures |
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Authors: | A.K. Sinha H.J. Levinstein L.P. Adda E.N. Fuls E.I. Povilonis |
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Affiliation: | Bell Laboratories, Murray Hill, NJ 07974, U.S.A. |
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Abstract: | It is shown that the slow-trapping instability upon negative bias-temperature aging of MOS structures (poly-Si and Al-gate) can be significantly reduced by a high temperature (800–900°C) H2-anneal prior to Al metallization. Additional data are presented on the effects of high (700–900°C) and low temperature (450°C) H2 annealing of MOS structures containing n-(111) Si, dry HCl oxide and B-doped poly-Si. The midgap Nss (range: 8×1011 to 1.5×1010 cm?2 eV?1) is reduced by both high and low temperature H2 anneals whereas the Qss (range: 7×1011 to 1×1011 cm?2 eV?1) is reduced mainly by the high-temperature H2-anneals. Presence of B near the interface is believed to cause an abnormal voltage asymmetry of the slow-trapping drift, i.e. ΔVFB(-BT) < ΔVFB(+BT). These effects are discussed in the light of Deal's model of the structure of the Si/SiO2 interface. |
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