The effect of surface states on the characteristics of MIS field effect transistors

A theoretical model, including the effect of surface trapping and velocity limiting, is developed for the MISFET and is compared with experimental data obtained on depletion mode GaAs anodic oxide devices. It is shown that the results are consistent with a model in which the surface states are inoperative at frequencies in excess of ～10² Hz while at lower frequencies the traps can follow the applied signal leading to a marked reduction in transconductance. The FET data are shown to be entirely consistent with the available C/V data on this semiconductor and suggest that at low frequencies near zero bias the surface potential varies by as little as 18 meV per volt of applied gate bias for the 100 nm of oxide typical of such structures.