Voltage-Clock Scaling for Low Energy Consumption in Fixed-Priority Real-Time Systems |
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Authors: | Lee Yann-Hang Krishna C M |
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Affiliation: | (1) Computer Science and Engineering Department, Arizona State University, P.O. Box 875406, Tempe, AZ, 85287-5406;(2) Electrical and Computer Engineering Department, University of Massachusetts, Amherst, MA, 01003 |
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Abstract: | Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption. |
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Keywords: | voltage-scaling scheduling low-power designs real-time embedded systems |
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