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Power management in the Amulet microprocessors |
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| Authors: | Furber S.B. Efthymiou A. Garside J.D. Lloyd D.W. Lewis M.J.G. Temple S. |
| Affiliation: | Manchester Univ.; |
| Abstract: | Amulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has positive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wasteful activity |
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