一种PCI总线Master模块接口设计

该模块挂接在一款SPARCV8处理器的片内AHB总线上，作为AHB总线上的从机受CPU控制，作为PCI主设备实现处理器内部的PCI总线传输功能。模块主要接受来自AHB总线的信号，通过寄存器操作将其转化为标准的PCI命令，从而完成PCI主机与从机之间的通信。模块支持标准的PCI2．2协议操作和异常处理，用户可以通过PCI总线或AHB总线完成模块内部的寄存器配置功能。文章还介绍了模块的系统仿真和FPGA验证结果。结论表明，该设计方案是可行的、有效的；可以正确完成PCI总线的通信功能。

Design of PCI Master Interface

The module is attached to the AHB bus on the processor based on the structure of SPARC V8, it is controlled by the CPU as a target on the AHB bus and a master on the PCI bus to finish transmission. The module receives signals from the AHB bus, converting it into a standard PCI command by registers operation to complete the communication between PCI master and slave. Supporting PCI 2. 2 protocol operations and error-handling, users can config the internal configuration register by PCI bus or AHB bus. It also describes the module system simulation and FPGA verification. Conclusion shows that the design is feasible and effective, it can finish PCI bus com- munication correctly.