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Adaptively designed test logic for digital circuits |
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| Authors: | Aleksander I. Al-Bandar Z. |
| Affiliation: | Brunel University, Department of Electrical Engineering & Electronics, Uxbridge, UK; |
| Abstract: | Adaptive n-tuple pattern-recognition techniques in their hardware embodiment may be used to design test circuits for logic systems which indicate the presence of a fault. The principles of this concept are explained and early results obtained with realistically scaled circuits are presented. |
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