An FPGA implementation of the AES-Rijndael in OCB/ECB modes of operation

Implementation in one FPGA of the AES-Rijndael in Offset Codebook (OCB) and Electronic Codebook (ECB) modes of operation was developed and experimentally tested using the Insight Development Kit board, based on Xilinx Virtex II XC2V1000-4 device. The circuit was designed to provide simultaneous data privacy and authenticity in applications which require small area such as wireless LANs, cellular phones, and smart cards. The experimental clock frequency was equal to 50 MHz and translates to the throughputs of 493 Mbit/s for block size and key size of 128 bits, respectively. The circuit combines the efficiency of OCB authentication with the high security of Rijndael encryption/decryption algorithms, offering an authenticated encryption/decryption scheme.