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面向非规则大数据分析应用的多核帮助线程预取方法
引用本文:张建勋,古志民,胡潇涵,蔡 旻.面向非规则大数据分析应用的多核帮助线程预取方法[J].通信学报,2014,35(8):17-146.
作者姓名:张建勋  古志民  胡潇涵  蔡 旻
作者单位:1. 北京理工大学 计算机学院,北京 100081;2. 天津中医药大学 网络中心,天津 300193
基金项目:国家自然科学基金资助项目(61070029, 61370062)
摘    要:大数据分析应用往往采用基于大型稀疏图的遍历算法,其主要特点是非规则数据密集访存。以频繁使用的具有大型稀疏图遍历特征的介度中心算法为例,提出一种基于帮助线程的多参数预取控制模型和参数优化方法,从而达到提高非规则数据密集程序性能的目的。在商用多核平台Q6600和I7上运用该方法后,介度中心算法在不同规模输入下平均性能加速比分别为1.20和1.11。实验结果表明,帮助线程预取能够有效提升该类非规则应用程序的性能。

关 键 词:帮助线程预取  非规则数据密集应用  介度中心性
收稿时间:5/2/2013 12:00:00 AM

Multi-core helper thread prefetching for irregular data intensive applications
Jian-xun ZHANG,Zhi-min GU,Xiao-han HU,Min CAI.Multi-core helper thread prefetching for irregular data intensive applications[J].Journal on Communications,2014,35(8):17-146.
Authors:Jian-xun ZHANG  Zhi-min GU  Xiao-han HU  Min CAI
Affiliation:1. School of Computer Science and Technology, Beijing Institute of Technology, Beijing 100081, China;2. Network Center, Tianjin University of Traditional Chinese Medicine, Tianjin 300193, China
Abstract:Big data analysis applications often use sparse graph traversal algorithm which characterized by irregular data intensive memory access. For improving performance of memory access in sparse graph traversal algorithm, helper thread prefetching could convert discontinuous locality into continuous-instant spatial-temporal locality effectively by using the shared last level cache of chip multi-processor platforms. Betweenness centrality algorithm was used as a case study, the multi-parameter prefetching model of helper thread and optimized instances were presented and evaluated on commercial CMP platforms Q6600 and I7, the average speedup of betweenness centrality algorithm at different input scale is 1.20 and 1.11 respectively. The experiment results show that helper thread prefetching can improve the performance of irregular applications effectively.
Keywords:helper thread prefetching  irregular data intensive applications  betweenness centrality
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