Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses |
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Authors: | Liang Zhang Wilson JM Bashirullah R Luo L Jian Xu Franzon PD |
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Affiliation: | Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC; |
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Abstract: | This paper demonstrates that driver preemphasis technique can be used for on-chip global buses to increase signal channel bandwidth. Compared to conventional repeater insertion techniques, driver preemphasis saves repeater layout complexity and reduces power consumption by 12%-39% for data activity factors above 0.1. A driver circuit architecture using voltage-mode preemphasis technique was tested in 0.18-mum CMOS technology for 10-mm long interconnects at 2 Gb/s |
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