Parametric Evaluation of Routing Algorithms in Network on Chip Architecture |
| |
Authors: | Mohammad Behrouzian Nejad |
| |
Affiliation: | Department of Computer Engineering, Shadegan Branch, Islamic Azad University, Shadegan, Iran |
| |
Abstract: | Considering that routing algorithms for the Network on Chip (NoC) architecture is one of the key issues that determine its ultimate performance, several
things have to be considered for developing new routing algorithms. This includes examining the strengths, capabilities, and weaknesses of the commonly
proposed algorithms as a starting point for developing new ones.
Because most of the algorithms presented are based on the well-known algorithms that are studied and evaluated in this research. Finally, according to
the results produced under different conditions, better decisions can be made when using the aforementioned algorithms as well as when presenting new
routing algorithms. In this research, we first describe the existing algorithms include: XY, YX, Odd- Even and DyAD. We then evaluate each of the routing
algorithms which naturally have their own strengths and weaknesses under different conditions. In the first scenario, based on the criteria of average latency,
average throughput and average energy consumption in determining the final performance of the network on the chip, we show the algorithms in terms of
their performance by deterministic and adaptive routing algorithms. In the second scenario, we evaluate the algorithms based on the network size and the
number of cores on the chip. As a result, these algorithms can make better decisions when using these algorithms as well as when presenting new routing
algorithms, considering the results produced under different condition. |
| |
Keywords: | Network on Chip Routing Algorithm Latency Throughput Energy Consumption |
|
| 点击此处可从《计算机系统科学与工程》浏览原始摘要信息 |
|
点击此处可从《计算机系统科学与工程》下载全文 |
|