Optimal load control of spc switches: Waiting time minimization

We address the problem of load control of a switching node with a centralized processor architecture. The problem of finding regulators that minimize the mean dialtone delay is formulated and solved using a semi-Markov decision process model. The results show that for Poisson arrivals one may reduce this delay by up to 60%, depending on the arrival intensity, the service time distribution, and the dialling time distribution, by using an optimal regulator instead of a very simple, but natural, one. We also study the transient properties of the optimal regulators, their behaviour for an MMPP arrival process, and discuss their robustness with respect to various model assumptions.This work was performed while the author was with the Department of Communication Systems, Lund Institute of Technology.