Double RESURF nLDMOS功率器件的优化设计

基于漂移区表面具有单个P-top层Double RESURF nLDMOS的结构和耐压机理,提出了具有P-top层终端结构的Double RESURF nLDMOS结构,并通过利用SENTAURUS TSUPREM4和DEVICES软件进行优化设计。P-top层终端结构不仅降低了击穿电压对P-top层参数的敏感度,而且在漂移区引入一个附加的电场峰值,使漂移区电场分布进一步趋于平坦化。与传统Single RESURF和普通Double RESURF器件相对比,击穿电压可以分别提高约13.5%和4%,导通电阻却提高了11.8%和6%,但在满足击穿电压相等的条件下,该结构通过控制P-top层的位置和漂移区剂量可以使导通电阻降低约37%。

Design and Optimization of Double RESURF nLDMOS Power Devices

This paper proposes a novel double RESURF nLDMOS with a P-top layer terminal,based on the structure and breakdown principle of the double RESURF nLDMOS with a single P-top layer,and optimizes this new structure by TSUPREM4 and SENTAURUS DEVICES.The P-top layer terminal weakens the dependence of the breakdown voltage on the P-top layers,and produces an additional electric field peak in the drift region resulted in flatening of the distribution of the electric field peaks.The simulation results indicate that the breakdown voltage is greatly improved by 13.5%and the 4%,and the on-resistance is increased by 11.8% and 6%,compared to the single RESURF and the conventional double RESURF LDMOS.Under the condition of the same breakdown voltage of three structures,on-resistance of this new structure can be reduced by 37% by controlling the P-top layer location and drift dose.