| 基于系统级FPGA/CPLD的SoPC嵌入式开发研究 |
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| 引用本文： | 梁玉红,黄晓林.基于系统级FPGA/CPLD的SoPC嵌入式开发研究[J].自动化与信息工程,2005,26(4):33-36. |
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| 作者姓名： | 梁玉红 黄晓林 |
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| 作者单位： | 湖北汽车工业学院电子信息系 |
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| 摘 要： | 针对基于系统级FPGA／CPLD的SoPC嵌入式设计特点，介绍采用SoPC Builder设计工具有选择地将处理器、存储器、I／O等系统设计所需的IP组件集成到PLD器件上，也可以通过自定义用户逻辑集成到PLD器件上的开发方法，构建高效SoC。文中分析了嵌入式处理器Nios软核的特性，并给出了基于Nios内核的SoPC软硬件开发流程和白定义用户逻辑的软硬件设计过程。
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| 关 键 词： | 系统级FPGA／CPLD SoC（片上系统） Sopc（可编程片上系统） SoPC Builder SoPC嵌入式开发 |
The Study and Development of SoPC Embedded Design Based on System FPGA/CPLD |
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| Liang Yuhong,Huang Xiaolin.The Study and Development of SoPC Embedded Design Based on System FPGA/CPLD[J].Automation & Information Engineering,2005,26(4):33-36. |
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| Authors: | Liang Yuhong Huang Xiaolin |
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| Abstract: | Aiming at some characters of SoPC embedded design based on system FPGA/CPLD, the soft-strategy of SoPC design based on IP is introduced. It can design a embedded SoPC by integrating processor, memory, I/Os and other IP peripherals selectively into a system FPGA. The characters of soft Nios processor core are analyzed and software and hardware development flows of user-define logic and soft Nios processor in SoPC design are given. |
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| Keywords: | System FPGA/CPLD SoC SoPC SoPC Builder Embedded SoPC Develepment |
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