Hypercube-based architecture for high speed communication systems |
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Authors: | D. KAUR P. J. FERNANDES L. P. EUGENE S. C. KWATRA |
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Affiliation: | Department of Electrical Engineering , University of Toledo , Toledo, OH, 43606, U.S.A |
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Abstract: | An implementation is presented of digital demultiplexing and demodulation algorithms for an advanced satellite communication system on a hypercube. The mapping on a hypercube provides the high speed necessary for processing hundreds of single channel per carrier/frequency division multiple access (SCPC/FDMA) voice/data channels. Data demultiplexing and demodulation are parts of the recovery of the transmitted digital data in a MODEM. A demultiplexer comprises a filter bank followed by the computation of FFT. A demodulator primarily consists of circuits to recovery carrier signal, clock frequency and data. The computation of FFT on a hypercube is well established (Hwang and Briggs 1984). Therefore, this paper analyses the filter bank and carrier and data recovery algorithms to find an efficient mapping in a multiprocessor environment connected in a hypercubic configuration. A few models to implement these algorithms on a hypercube are provided. Comparison of the speed-up achieved on a hypercube vrsus that on a sequential computer is provided for the three models. |
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