Sampled‐data poles,zeros, and modeling for current‐mode control |
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Authors: | Chung‐Chieh Fang |
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Affiliation: | Advanced Analog Technology, , 2F, No. 17, Industry E. 2nd Rd., Hsinchu, 300 Taiwan |
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Abstract: | Exact and approximate sampled‐data models in closed forms are derived for switching DC–DC converters under peak/valley current‐mode control. The corresponding sampled‐data poles and zeros in closed forms are also derived. The location and stability conditions of the poles and zeros, boundary conditions of subharmonic instability, and nulling of the audio‐susceptibility are also derived. It is proved that the stable operating range of the source voltage is linearly proportional to the ramp slope. The sampled‐data models agree with previous experiment results and accurately predict the subharmonic instability. The different view from the sampled‐data model about the number and stability (minimum phase) of pole and zero does not necessarily invalidate the traditional continuous‐time averaged model. However, this different view gives better prediction about converter dynamics and is useful for the analog or digital controller design for DC–DC converters. Copyright © 2011 John Wiley & Sons, Ltd. |
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Keywords: | DC– DC converter sampled‐data model current‐mode control small‐signal analysis subharmonic oscillation audio‐susceptibility |
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