A common‐mode replica compensated inductor–capacitor voltage‐controlled oscillator for mixed‐signal system‐on‐chip applications |
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Authors: | Weilin Xu Xi Chen Gaofeng Wang |
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Affiliation: | 1. School of Physics and Technology, Wuhan University, , Wuhan, 430072 China;2. Institute of Microelectronics and Information Technology, Wuhan University, , Wuhan, 430072 China;3. College of Information and Communication, Guilin University of Electronic Technology, , Guilin, 541004 China |
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Abstract: | A novel 1.57 GHz complementary metal–oxide semiconductor inductor–capacitor voltage‐controlled oscillator with the common‐mode replica compensation is introduced for mixed‐signal system‐on‐chip applications. In order to alleviate power line disturbances, the center tap node of differential symmetric inductor and the replica biasing circuit are adopted in the differential voltage regulating unit to reduce power supply sensitivity. In addition, this proposed design also leads to low tuning gain and low power dissipation. The post‐layout simulation results under the Taiwan Semiconductor Manufacturing Company's mixed‐signal 0.18 µm 1P6M process show that the proposed design achieves power supply rejection of ?68.6 dB at low frequencies and 1.2 MHz/V pushing sensitivity. It exhibits phase noise of ?130.6 dBc/Hz at a 1 MHz offset from a 1.57 GHz carrier yet dissipates only 5.58 mW under a 1.8 V power supply. Copyright © 2011 John Wiley & Sons, Ltd. |
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Keywords: | voltage‐controlled oscillators replica load power supply rejection phase noise integrated circuit design |
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