电应力对HfO2栅介质漏电流的影响

使用导电原子力显微镜（Conductive Atomic Force Microscopy，CAFM）对电压应力作用下HfO2栅介质薄膜局域漏电点的形成和产生机制进行了研究，结果表明，在电压应力作用下，HfO2介质层中的缺陷被驱动和聚集形成导电通道，产生漏电点。漏电点产生的数量、漏电流大小均受电压应力和作用时间的影响。HfO2栅介质层中晶界处的缺陷密度高于晶粒处，导致晶界处更容易产生漏电通道。在栅介质击穿过程中，电压应力在诱发漏电流产生的同时产生焦耳热，对HfO2介质表面造成热损伤，导致击穿后HfO2介质表面出现凹陷。

Influence of Voltage of HfO2-based Stress on the Leakage Gate Dielectrics

Conductive Atomic Force Microscopy （CAFM） based techniques were employed to study the formation mechanism of localized leaky spots in HfO2-based gate dielectrics under voltage stress. The results demonstrated that defects in HfO2 were driven by the applied voltage stress to concentrate, and conductive paths in the dielectric were formed, leading to the appearance of leaky spots. The amount of leaky spots and leakage current were attributed to voltage stress and the applied duration. The density of defects in grain boundaries was higher than that in the nanocrystal grains, making it easier to form conductive paths at grain boundaries. During the breakdown process, Joule heat generated with stress induced leakage current made thermal damage to the gate dielectric, resulting in the depression on the surface after breakdown.