| 高速大容量固态存储器设计 |
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| 引用本文： | 陆浩,王振占.高速大容量固态存储器设计[J].计算机工程,2011,37(15):226-227,231. |
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| 作者姓名： | 陆浩 王振占 |
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| 作者单位： | 1. 中国科学院研究生院,北京,100049;中国科学院空间科学与应用研究中心,北京,100190
2. 中国科学院空间科学与应用研究中心,北京,100190 |
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| 基金项目： | 中国科学院"百人计划"基金 |
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| 摘 要： | 为满足信息的高速大容量存储需求，提出基于闪存(FLASH)的固态存储器设计方法。介绍FLASH的结构、存储操作的实现方法和高速存储等相关技术。以通用串行总线和现场可编程门阵列(FPGA)可编程设计为基础，通过FPGA对多片FLASH的编程控制实现高速大容量存储。仿真结果证明，该方法能实现80 MB/s的数据记录速度和20 MB/s的数据回放速度，以及256 GB的存储容量。
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| 关 键 词： | 现场可编程门阵列 通用串行总线 闪存 大容量 流水线技术 |
| 收稿时间： | 2011-01-25 |
Design of High-rate Mass-capacity Solid-state Memory |
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| LU Hao,WANG Zhen-zhan.Design of High-rate Mass-capacity Solid-state Memory[J].Computer Engineering,2011,37(15):226-227,231. |
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| Authors: | LU Hao WANG Zhen-zhan |
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| Affiliation: | 1.Graduate University of Chinese Academy of Sciences,Beijng 100049,China;2.Center for Space Science and Applied Research,Chinese Academy of Sciences,Beijing 100190,China) |
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| Abstract: | To satisfy high-rate mass-capacity data recording, a novelty record device is introduced by the paper based on FLASH. The method to operate FLASH array and the skill about high-rate record are described. Based on Universal Serial Bus（USB） and FPGA technique, several FLASH slices work together controlled by FPGA to complete high-rate mass-capacity. The design utilizes module method and pipelining technology. Simulation result shows that the system can achieve data recording speed of 80 MB/s, data playback speed of 20 MB/s, storage capacity of 256 GB. |
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| Keywords: | Field Programmable Gate Array（FPGA） Universal Serial Bus（USB） FLASH mass-capacity pipelining technique |
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