| 基于SoPC的前端RapidIO接口设计 |
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| 引用本文： | 施春辉,柴小丽,宋慰军,章乐. 基于SoPC的前端RapidIO接口设计[J]. 计算机工程, 2011, 37(20): 239-241. DOI: 10.3969/j.issn.1000-3428.2011.20.082 |
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| 作者姓名： | 施春辉 柴小丽 宋慰军 章乐 |
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| 作者单位： | 中国电子科技集团公司第三十二研究所,上海,200233 |
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| 摘 要： | 针对现代高性能嵌入式系统高速RapidIO信号接入的应用需求，提出一种基于可编程片上系统(SoPC)的前端RapidIO接口设计方案，以VirtexII Pro现场可编程门阵列芯片为核心，利用RapidIO IP核等库资源及硬件编程实现RapidIO接口、低压差分信号图像接口、RS422控制接口间的信息转发逻辑。该方案能够提高信息采集和输出的时效性。
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| 关 键 词： | 嵌入式系统 可编程片上系统 RapidIO协议 低压差分信号 |
| 收稿时间： | 2011-03-13 |
Design of Front RapidIO Interface Based on SoPC |
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| SHI Chun-hui,CHAI Xiao-li,SONG Wei-jun,ZHANG Le. Design of Front RapidIO Interface Based on SoPC[J]. Computer Engineering, 2011, 37(20): 239-241. DOI: 10.3969/j.issn.1000-3428.2011.20.082 |
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| Authors: | SHI Chun-hui CHAI Xiao-li SONG Wei-jun ZHANG Le |
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| Affiliation: | (The 32nd Resaerch Institute of China Electronics Technology Group Corporation,Shanghai 200233,China) |
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| Abstract: | With respect to the requirement of high speed RapidIO signal connection of high performance embedded system,this paper proposes a method for a front RapidIO interface on System-on-a-Programmable-Chip（SoPC）.The method builds message transmission logic among RapidIO interface,Low Voltage Differential Signal（LVDS） image interface and RS422 control interface with RapidIO IP core and hardware programming based on the development platform of Xilinx VirtexII Pro.Hardware architecture diagrams and key design thoughts are introduced and the software architecture is presented. |
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| Keywords: | embedded system System-on-a-Programmable-Chip（SoPC） RapidIO protocol Low Voltage Differential Signal（LVDS） |
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