基于跳转轨迹的分支目标缓冲研究

现代计算机体系结构受两个方面的困扰:性能和能耗。为降低嵌入式处理器日益增长的功耗,提出基于跳转轨迹的分支目标缓冲结构(TG-BTB)。与传统分支目标缓冲每次提取指令时需要查询分支目标缓冲不同,TG-BTB只在执行轨迹预测为跳转时才查询分支目标缓冲。该结构通过在程序执行过程中动态分析跳转轨迹行为,可以实现只在轨迹跳转时查询分支目标缓冲,从而降低功耗。在动态分析过程中首先提取记录两条跳转分支指令之间的指令间隔,然后将提取的指令间隔存储在TG-BTB中,最后根据存储在TG-BTB中的指令间隔决定是否需要查询BTB。基于基准测试向量进行模型验证和性能测试,实验结果表明TG-BTB降低了81%的BTB查询能耗。

Efficient BTB Based on Taken Trace

Computer architecture is beset with two opposing things:performance and energy consumption.To reduce the increasing energy consumption of embedded processor,we proposed a taken trace branch target buffer (TG-BTB) which is an energy efficient BTB scheme for embedded processors.Unlike the conventional BTB scheme,which requires lookup BTB every instruction fetch,the TG-BTB need lookup BTB only when the trace is a taken trace.This structure dynamically analyzes the trace behavior during program execution,and TG-BTB can achieve lookup BTB per taken trace and reduce the energy consumption of BTB lookup.In the process of dynamic analyzing,TG-BTB detects the instruction interval between two taken instructions firstly,and then stores this value into TG-BTB.Finally,the scheme determines to perform BTB lookup or not according to the instruction interval.The experimental results demonstrate TG-BTB achieves 81% energy consumption reduction compared to the conventional BTB scheme.